SRC capacity exceeded: Total channels have been muted. More...
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Symbol meaning
1:1 Routing (active)
1:1 Routing (active, involves clock B)
1:1 Routing (inactive: missing signal(s) or clock)
1:1 Routing (different states)
Sub-routings (active). Click to expand details
Sub-routings (active, involves clock B)
Sub-routings (inactive: missing signal(s) or clock)
Sub-routings (different states)
Unavailable channel (inputs appear muted, outputs are ignored)
(A|B) Clock source for input/output.
Usage
• Click a field to make or break a route. Large fields are 64x64, medium fields 8x8 and small fields 1x1 channels wide.
Clicking a field routes all contained channels at once in a linear (1:1) fashion.
• Click+drag to make multiple routes. Hold SHIFT to delete multiple routes.
• Click to expand to group/channel levels, to collapse.
• The " Optimal" button adjusts the view which makes all sub-routings visible.
How to use
The list on the left contains all currently defined routes, in the format described below.
To add a route, click and enter the route accordingly
To change a route, select it from the list and click on
To remove a route, select it from the list and click on
Sources and sinks can be specified as follows:
Entire interfaces (all 64 channels) as abbreviation: AD, MO, MC, MT, AE, DA, FLX1, FLX2, FLX3 (for ADAT, MADI optical, MADI coaxial, MADI-TP, AES50, Dante or FlexLink)
Subrange (1-64 channels on a particular interface) interface:start-end E.g. MADI optical, channels 9-16 will be written as MO:9-16
Single channel a particular interface: interface:ch E.g. Dante, channel 22 will be written as DA:22
Routes can be given as either "Source > Sink", or "Sink < Source":
MO > DA routes all 64 channels from MADI optical to Dante
MC:4 > AE:8 routes channel 1 from MADI coaxial to AES50, channel 8
AD:1-8 < AE:41-48 makes AES50 channels 41-48 appear on ADAT channels 1-8
Notes:
Aggregate interfaces (i.e. MO+MC on the ASRC) are specified only as the first part, e.g. MO,
the second interface (MC) is implicitly added.
A route can also be cleared by specifying NONE as source, i.e. AD < NONE.
Clock A (main clock, for everything except the SRC inputs/outputs)
All I/Os except those selected for SRC use this clock
Unknown
Clock B (alternate clock for input/outputs routed through SRC)
Enables selected inputs and/or outputs to run on a different clock
In most cases, set this to match the first SRC input
Unknown
Monitor (Headphones)
Input interface where the monitor listens to
For stereo monitoring: left channel number
Extra gain can be configured in "Device" tab.
Settings (* indicates default setting, [xx] indicates function number)
Extra gain may cause clipping on large signals! [01]
Output format for MO (input always auto-detected) [02]
Standard MADI (AES10)
Output format for MC (input always auto-detected) [03]
This app emulates a real multiverter, and gives you an impression of what's possible. Feel free to play around and discover!
A few important things to note:
The demo tries to act like a multiverter. All ports (except "Extension") are considered to have a valid connection.
You can store and recall presets just as in the real world - it uses cookies to emulate the MVR's storage.
In the real world, the remote runs on the MVR's Dante module. It can accessed anywhere from the Dante network by simply typing multiverter's IP into your browser's address line (you can look it up in the Dante Controller).
Ensure you're using a recent browser. All flavours of IE will NOT WORK!
If you discovered a bug, just drop us a note to info@appsys.ch
No connection
Check if the multiverter is connected to the network and powered up.
Firmware inconsistent
The multiverter's different firmware components do not match each other. This could result in unpredictable errors and malfunctions and is therefore strongly discouraged.
Please make sure that you upgrade all parts from the same firmware package:
FPGA/Frontpanel over the USB port, by running MVR-64-Updater.bat on a Windows computer
Dante over the network, by running Dante Firmware Update Manager to load the file MVR-64-x.x.x.x.dnt contained in the firmware package.
Currently installed: FPGA , Frontpanel , Dante
SRC capacity exceeded
You have routed more channels between different clock domains than the SRC has capacity. Current routing requires: channels between clock domains A→B ( available) channels between clock domains B→A ( available)
Excess channels (bottom-most/right-most on the matrix) have been muted. Remove unused channels from the routing to make this warning disappear.
What are the limits?
The SRC works bi-directionally, i.e. converts from clock domain A to B, and from B to A. The maximum number of channels in each direction (A→B x B→A) depends on the highest sample rate used in the system:
128 total with flexible direction assignment, when the highest sample rate is 44.1/48k
Depending on the routed channels, the SRC is automatically configured as 128x0, 112x16, 96x32, 80x48, 64x64, 48x80, 96x32, 16x112 or 0x128 channels.
This requires at least SRC firmware 2.0 (currently installed: ). In previous versions it's 64x64 fixed.
64x64 fixed when the highest sample rate is 88.2/96kHz
32x32 fixed when the highest sample rate is 176.4/192kHz
Unavailable channel (inputs appear muted, outputs are ignored)